CubeSat and SmallSat Payload Controller - NanoAvionics
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CubeSat and SmallSat Payload Controller

CubeSat and SmallSat Payload Controller 1.5 / 2.0

The minimum order quantity for this subsystem is 5 pieces, including a configurability.

Payload Controller is a dedicated subsystem that serves as the interface between the satellite’s payload and its data storage unit in micro- and nano-satellite platforms. It supports multiple electrical interfaces, provides data buffering capabilities, and is fully compatible with S-band and X-band radio subsystems for efficient transmission of buffered data to ground stations.

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The minimum order quantity for this subsystem is 5 pieces, including a configurability.

Payload Controller is a dedicated subsystem that serves as the interface between the satellite’s payload and its data storage unit in micro- and nano-satellite platforms. It supports multiple electrical interfaces, provides data buffering capabilities, and is fully compatible with S-band and X-band radio subsystems for efficient transmission of buffered data to ground stations.

  • PC 1.5 Features:

    Features:

    • Clock speed up to 400 MHz (configurable)
    • 1 MB of internal RAM 
    • 2 MB of internal FLASH memory 
    • 512 kB of FMC-connected FRAM memory 
    • 4 MB FMC-connected SRAM 
    • 256 MB of external NOR-FLASH for data storage
    • 2×512 kB of FRAM (SPI) for frequently changing data storage 
    • Integrated TRC 
    • Parallel NAND memory
    • Three On-Board PWM Controlled H-Bridges 
    • PWM Outputs 
    • FreeRTOS 
    • In-Orbit firmware update 
    • Firmware Power-on-check and Restore 
    • RFS – Redundant Record-based File System 
    • CSP Support 
    • Self-Diagnostics 
    • Dynamic CPU Frequency Control 
    • User-friendly Console 

    Payload Interfaces:

    • 100BASE-TX Ethernet Port 
    • CAN Interface 
    • RS422 (on request interchangeable with RS485) 
    • Buffered SPI 
    • USART/UART 
    • I2C 
  • PC 2.0 Features:

    Features:

    • FPGA with SoC family device featuring ARM processor.
    • Maximum frequency 667 MHz.
    • 74K Programmable Logic Cells.
    • 256 KB on-chip RAM (processor) and 36 KB block RAM (programmable logic).
    • 32 MB of external NOR-FLASH for Boot (2× 16 MB chips, QSPI).
    • 32 GB of external NAND-FLASH (2× 16 GB chips, parallel interface).
    • 3 × 512KB of FRAM (SPI) for frequently changing data storage.
    • 512MB of RAM (DDR3 with ECC).
    • PetaLinux operating system.
    • UBIFS File System.
    • In-Orbit firmware update.
    • Firmware Power-on-check and restore
    • CSP Support.
    • Self-Diagnostics.
    • Dynamic CPU Frequency Control.
    • User-friendly Console

    Payload Interfaces:

    • Ethernet (with integrated magnetics).
    • CAN Interfaces.
    • RS422/UART.
    • SPI.
    • UART (Debug).
    • I2C.
    • USB 2.0.
    • Up to 20 x LVDS.
    • Up to 40 x GPIOs.
    • Up to 5 x SpaceWire
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